The input, A 3 is directly connected to Enable, E of upper 3 to 8 decoder in order to get the outputs, Y 15 to Y 8. The complement of input, A3 is connected to Enable, E of lower 3 to 8 decoder in order to get the outputs, Y 7 to Y 0. The parallel inputs A 2, A 1 & A 0 are applied to each 3 to 8 decoder. The block diagram of 4 to 16 decoder using 3 to 8 decoders is shown in the following figure. Therefore, we require two 3 to 8 decoders for implementing one 4 to 16 decoder.
$$Required \: number \: of \: lower \: order \: decoders=\frac=2$$ We can find the number of lower order decoders required for implementing higher order decoder using the following formula. Whereas, 3 to 8 Decoder has three inputs A 2, A 1 & A 0 and eight outputs, Y 7 to Y 0. We know that 2 to 4 Decoder has two inputs, A 1 & A 0 and four outputs, Y 3 to Y 0. In this section, let us implement 3 to 8 decoder using 2 to 4 decoders. Now, let us implement the following two higher-order decoders using lower-order decoders. Similarly, 3 to 8 decoder produces eight min terms of three input variables A 2, A 1 & A 0 and 4 to 16 decoder produces sixteen min terms of four input variables A 3, A 2, A 1 & A 0. If enable, E is zero, then all the outputs of decoder will be equal to zero. Therefore, the outputs of 2 to 4 decoder are nothing but the min terms of two input variables A 1 & A 0, when enable, E is equal to one. The circuit diagram of 2 to 4 decoder is shown in the following figure. We can implement these four product terms by using four AND gates having three inputs each & two inverters. So, there are four product terms in total. Enableįrom Truth table, we can write the Boolean functions for each output asĮach output is having one product term. The Truth table of 2 to 4 decoder is shown below. One of these four outputs will be ‘1’ for each combination of inputs when enable, E is ‘1’. The block diagram of 2 to 4 decoder is shown in the following figure. Let 2 to 4 Decoder has two inputs A 1 & A 0 and four outputs Y 3, Y 2, Y 1 & Y 0. The outputs of the decoder are nothing but the min terms of ‘n’ input variables (lines), when it is enabled. That means decoder detects a particular code. One of these outputs will be active High based on the combination of inputs present, when the decoder is enabled. Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2 n output lines.